STARM · HW-01 · HARDWARE

Hardware Backdoors

Back to the STARM matrix

STARMCatalog entries from the DIPS Threat Inventory. The paper cites that dataset and does not use this name.

Malicious circuits implanted during chip manufacturing.

Severity in the dataset9/10

Not the paper’s H/M/L.

Target
Instructions
Layer in the inventory
ASICs (Application-Specific Integrated Circuits) / FPGAs (Field-Programmable Gate Arrays)
Mitigation
Secure chip design & visual inspection.
How the inventory says to fix it
AI/ML: Computer Vision for visual inspection of silicon dies to detect non-standard circuitry patterns.
Quick fix
N/A
ML approaches named
Random Forest (RF), Deep Neural Networks (DNNs) & Convolutional Neural Networks (CNNs), K-Nearest Neighbors (KNN), Support Vector Machine (SVM)
Methodology
By analyzing side-channel data (power, electromagnetic radiation, or timing) to identify anomalies that deviate from a "golden" (trusted) IC model
Handler role
Hardware Engineer
Stage
Manufacturing
Standard named
ISO 20243
Status in the inventory
Partially managed

STARMCatalog entries from the DIPS Threat Inventory. The paper cites that dataset and does not use this name.

Connection recorded in the inventory

Supply Chain Interdiction